Publication: FPGA '16: Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate ArraysFebruary 2016 Pages 276https://doi.org/10.1145/2847263.2847297
May 01, 2017 There are several ways to support the data scientist in this cumbersome lab work of tuning machine learning model parameters. These approaches are called hyperparameter. Jun 10, 2018 Machine Learning Control: Tuning a PID Controller with Genetic Algorithms (Part 2) - Duration: 9:45. Steve Brunton 5,844 views.
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Machine Learning Auto Tuning Parts
Modern High-Level Synthesis (HLS) tools allow C descriptions of computation to be compiled to optimized low-level RTL, but expose a range of manual optimization options, compiler directives and tweaks to the developer. In many instances, this results in a tedious iterative development flow to meet resource, timing and power constraints which defeats the purpose of adopting the high-level abstraction in the first place. In this paper, we show how to use Machine Learning routines to predict the impact of HLS compiler optimization on final FPGA utilization metrics. We compile multiple variations of the high-level C code across a range of compiler optimizations and pragmas to generate a large design space of candidate solutions. On the Machsuite benchmarks, we are able to train a linear regression model to predict resources, latency and frequency metrics with high accuracy (R2 > 0.75). We expect such developer-assistance tools to (1) offer insight to drive manual selection of suitable directive combinations, and (2) automate the process of selecting directives in the complex design space of modern HLS design.
- N. Kapre, B. Chandrashekaran, H. Ng, and K. Teo. Driving timing convergence of FPGA designs through Machine Learning and Cloud Computing. In Field-Programmable Custom Computing Machines (FCCM), 2015 IEEE 23rd Annual International Symposium on, pages 119--126, May 2015. Google ScholarDigital Library
- N. Kapre, H. Ng, K. Teo, and J. Naude. Intime: A Machine Learning approach for efficient selection of FPGA CAD tool parameters. In Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA '15, pages 23--26, New York, NY, USA, 2015. ACM. Google ScholarDigital Library
Machine-Learning driven Auto-Tuning of High-Level Synthesis for FPGAs (Abstract Only)
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298 pagesDOI:10.1145/2847263- General Chair:
- Deming Chen,
- Program Chair:
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